Registers
The RV32IM architecture defines a set of 32 general-purpose registers (x0 to x31), which are 32 bits wide. These registers are used to store data and perform computations within the CPU core.
Name |
Width |
Number |
Description |
|---|---|---|---|
x0 |
32 |
0 |
Hard-wired zero |
x1 |
32 |
1 |
Return address |
x2 |
32 |
2 |
Stack pointer |
x3 |
32 |
3 |
Global pointer |
x4 |
32 |
4 |
Thread pointer |
x5 |
32 |
5 |
Temporaries (1) |
x6 |
32 |
6 |
Temporaries (2) |
x7 |
32 |
7 |
Temporaries (3) |
x8 |
32 |
8 |
Temporaries (4) |
x9 |
32 |
9 |
Temporaries (5) |
x10 |
32 |
10 |
Temporaries (6) |
x11 |
32 |
11 |
Temporaries (7) |
x12 |
32 |
12 |
Reserved for platform use |
x13 |
32 |
13 |
Reserved for platform use |
x14 |
32 |
14 |
Reserved for platform use |
x15 |
32 |
15 |
Reserved for platform use |
x16 |
32 |
16 |
Reserved for platform use |
x17 |
32 |
17 |
Reserved for platform use |
x18 |
32 |
18 |
Reserved for platform use |
x19 |
32 |
19 |
Reserved for platform use |
x20 |
32 |
20 |
Reserved for platform use |
x21 |
32 |
21 |
Reserved for platform use |
x22 |
32 |
22 |
Reserved for platform use |
x23 |
32 |
23 |
Reserved for platform use |
x24 |
32 |
24 |
Reserved for platform use |
x25 |
32 |
25 |
Reserved for platform use |
x26 |
32 |
26 |
Reserved for platform use |
x27 |
32 |
27 |
Reserved for platform use |
x28 |
32 |
28 |
Reserved for platform use |
x29 |
32 |
29 |
Reserved for platform use |
x30 |
32 |
30 |
Reserved for platform use |
x31 |
32 |
31 |
Reserved for platform use |
Additionally, there are special-purpose registers, including the program counter (PC), stack pointer (SP), and various control and status registers (CSRs) used for managing exceptions, interrupts, and other system-level operations.
The THEJAS32 SoC may also include additional registers for specific purposes, such as peripheral control and configuration.